IEC 62530-2021SystemVerilog - Unified Hardware Design, Specification, and Verification Language IEC 62530-2021SystemVerilog - Unified Hardware Design, Specification, and Verification Language

IEC 62530-2021SystemVerilog - Unified Hardware Design, Specification, and Verification Language

  • 标准类别:[IEC] 国际电工委员会标准
  • 标准大小:
  • 标准编号:IEC 62530-2021
  • 标准状态:
  • 更新时间:2022-04-01
  • 下载次数:
标准简介

IEC 62530-2021SystemVerilog - Unified Hardware Design, Specification, and Verification Language

标准截图