A detection method for logic functions suitable for dual-logic synthesis

Logic functions can be implemented in either AND/OR/NOT-based traditional Boolean (TB) logic or AND/XOR-based Reed-Mul-ler (RM) logic. To the majority of logic functions, it will be beneficial to be partially implemented in both TB logic and RM logic, called dual-logic. In this paper, a detection condition favoring dual-logic synthesis is proposed. A corresponding detection algorithm is devel-oped and implemented in C. The algorithm is applied to test a set of MCNC91 benchmarks for verifying the algorithm. The results show that the proposed algorithm is more efficient than published ones.